EEDEHD ARM Cortex Heterogeneous MCU Architectures

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Introduction

This is a listing of "novel" ARM Cortex solutions, which includes:

Multi-core offers, with different cores in particular (such as pairing an M4F with an M7).

SoC offers (such as pairing an Applications MCU / MPU with an Embedded/Realtime MCU).

Heterogeneous computing solutions (such as pairing an MCU with an FPGA).


It is exceedingly critical to understand that all engineering design decisions (1) start with project-initiating requests/constrains/specifications, (2) must of course utilize solutions currently available, (3) ensure that the entire design process is meeting project needs in a proper, well-engineered, economical, and safe manner, and (4) always involve making trade-offs as needed.

It is therefore extremely important to understand our project parameters. Project parameters are: an MCU for an embedded application, most often communicating with a separate FPGA IC, communicating over multiple interface protocols, and offloading data via fast and bulk transfers to a host PC (via USB, Ethernet, SDCard, etc).

While we are as blown away by currently available Computer in a Module / Computer on Board / Single Board Computer offers that give us a very affordable SoC with an Application CPU as just one core, and with computing power on paper equivalent to a ten-year-old laptop, such SBCs are NOT our intended target market. An SBC and such SoCs targeting these SBC/cellphone/consumer electronics markets have the following issues for our application:

This is NOT an embedded application.

Even at these low power levels, low prices, and high-efficiency cores, these solutions are NOT efficient, especially given idiotic use of multiple layers of software (OS, application, interpreter, interpreted language, shell/terminal, etc, etc, etc) just to accomplish the task of blinking an LED (the most typical application for such a powerful SBC running at a GHz, and doing a billion computations a second just to toggle an LED under control from a remote browser nonetheless being in the hand of a person in the same physical room as the "IoT" device).

There is no efficient way to get data in and out of these SoCs. Some give you a single PCIE lane, and most SBCs eat up that whole lane as a middle-layer PCB routing to the WiFi IC, or to transfer graphics data. Industrial embedded designs are NOT computing a billion operations of graphical data, they are transmitting data from one module or chip to another module or chip. Not that we cared about wireless or Internet connectivity to begin with.


A few more project criteria:

Nothing below Cortex M4F will be considered as the only core (that is, all choices must include M/R 4/4F/7).

Older series no longer interest us (ARM9, etc).



Research was done from DigiKey listings.

TODO usual DigiKey bullshit disclaimers.


From categories:

https://www.digikey.com/en/products/filter/embedded-microcontrollers/685

https://www.digikey.com/en/products/filter/embedded-microprocessors/694

https://www.digikey.com/en/products/filter/embedded-system-on-chip-soc/777

https://www.digikey.com/en/products/filter/embedded-fpgas-field-programmable-gate-array-with-microcontrollers/767

The following solutions were found (grouped by manufacturer):

Manufacturers Listings

STMicroelectronics

STMicroelectronics has the STM32H7 family, which pairs up an M7 core with an M4F core. We should consider using this in our future projects.

Texas Instruments

Texas Instruments has the TI Sitara family, which is an SoC which pairs an Application microcontroller core with a Realtime microcontroller core. These have very fast speed interconnect like PCI-E, OctalSPI, HyperBus, Gigabit Ethernet, USB 3.1, etc. Relatively affordable at $50/ea. We will look at TI Sitara family more closely in the future, although the 784-FCBGA will be costly to design for.

TI also has Hercules family, which contain Realtime R4/R4F/R5F MCUs. We should look at these later.

RM family

DRA829 Jacinto family

TDA3x SoC family for Advanced Driver Assistance Systems

TDA4VM Jacinto Processors family for ADAS and Autonomous Vehicles

NXP USA Inc

NXP USA Inc (formerly NXP Semiconductors, Freescale Semiconductor) has the following families which pair an Applications core with an Embedded core:

i.MX

i.MX6SX

i.MX7D

i.MX7S

i.MX8MN. ARM Cortex-A53 + ARM Cortex-M7. No fast chip to chip interconnect, though.

Vybrid, VF3xxR

Vybrid, VF5xxR

Vybrid, VF6xx

MAC57Dxxx

We should look at these in the future. TODO find out if any of these have very fast speed interconnect like PCI-E, OctalSPI, etc.

Cypress Semiconductor Corp

Cypress has many families that use Realtime R4, R5F cores, etc. We are not familiar with Cypress. TODO investigate merits of these offers.

Renesas

EC-1

RZ/T1 contain Realtime R4F MCU.

Analog Devices Inc./Maxim Integrated

MAX32655. MCU with Bluetooth.

MAX32680. MCU with Precision Analog Front-End and Bluetooth.

Xilinx

Xilinx has the Zynq UltraScale+family, which is an SoC which pairs an MCU with an FPGA. Given our parameters of requiring an Embedded or Realtime core, all options are prohibitively expensive, and all ICs come in very large packages.

Xilinx also has Versal™ Prime and Versal™ AI Core families. Same comments as for Zynq.

Therefore, we are not interested in what Xilinx is offering, for our projects.

Concluding Remarks

There is a large gap between ARM Cortex M4F and M7 and the next stop of Application SoCs. Although Application SoCs have the processing and superfast interconnect that will be beneficial for heterogeneous FPGA-MCU computing, the complexity of their packages is a very large step up from MCU-level packages and design complexity. At this point, without further research, it appears that there is no middle ground between affordable, easy, small, simple MCUs and SoCs that target SBCs and cellphones, etc.

Lack of ARM Cortex M7 offers in ANY format (individual IC, core, heterogeneous solution, etc) beyond STMicroelectronics, Microchip, and NXP is particularly concerning. We don't know whether that is due to slowness of uptake, or due to manufacturers trying to overstep M7 and jump to an applications core...